1. Field of the Invention
The present invention relates to graphics display systems and, in particular, to a graphics display system that may be dynamically reconfigured to support different display modes.
2. Discussion of the Prior Art
In a conventional computer graphics system, an electronic image of the screen is stored in a number of integrated circuit memory chips, typically random access memory (RAM). Taken together, these chips are known as the "display memory."
The display screen is composed of a number of dots, or "pixels", each of which can be independently set to any of a number of colors. The color of each pixel is defined by a plurality of pixel data bits stored in the display memory. "Pixel depth" describes the number of bits of pixel data stored in the display memory for each pixel on the screen. For n-bit pixel depth, the color of each pixel is encoded by an n-bit value; therefore, there are 2.sup.n possible colors for a selected pixel.
For a given amount of physical display memory available for graphics storage, more bits per pixel (i.e., greater pixel depth) means fewer pixels can be stored (i.e., smaller resolution). For the same graphics system, different users may choose to use different pixel depths and resolutions; or, the same user may at different times wish to choose different pixel depths and resolutions; or, in some systems, the user may choose to display different parts ("windows") of the screen at the same time using different pixel depths. A particular pixel depth/resolution combination is known as a "display mode." Currently available graphics controllers permit switching among different display modes.
Another element in a conventional computer graphics system, a graphics controller, communicates with the display memory to perform primary pixel data processing and display functions. For example, the controller modifies pixel data stored in the display memory under commands from an associated host computer ("display memory update"). Also, the controller periodically causes pixel data representing the current visible screen to be read from the display memory and displayed on the screen ("screen refresh").
In a common display memory format known as "direct color", the data for each pixel consists of a number of bits divided into three groups which represent Red, Green and Blue intensity components of the pixel color. One common direct color format is 24-bit "true color", which consists of 8 bits (one byte) each of Red, Green and Blue intensity levels. Other common direct color formats use 15 or 16 bits per pixel. Formats using 15 bits per pixel are generally padded with an extra unused bit and stored using 16 bits per pixel.
FIG. 1 shows a "5:6:5" display memory format wherein four 16-bit pixels P0-P3 are stored in a 64-bit wide memory "word." The "5:6:5" nomenclature means that 5 bits (R0) of each pixel (P0) define Red intensity, 6 bits (G0) define Green intensity, and 5 bits (B0) define Blue intensity.
An important characteristic of the FIG. 1 example is that the physical storage space of the display memory is used efficiently. That is, first, each 64-bit data word storage location in the display memory stores an integer number of pixels (i.e., four, in this case). Second, no pixel's data straddles two 64-bit words in memory. Third, for each 64-bit data word storing pixel information, 100% of the storage space is utilized (i.e., there is no wasted display memory storage space). These three advantages are present whenever the physical width of the display memory data word is an integer multiple of the pixel depth, as in the FIG. 1 example in which the 64-bit data word stores exactly four 16-bit "5:6:5" format pixels (P0-P3).
Many conventional computer graphics systems utilize a "packed" 24-bit pixel display mode, i.e., a mode in which the width of the data word storage location in the display memory is not an integer multiple of the pixel depth.
24-bit pixel formats may be implemented in a number of ways. For example, in the "RGBR" or "packed pixel" implementation shown in FIG. 2A, 24-bit pixels are stored across a 64-bit data word using every bit of the word. In the example shown in FIG. 2A, two 24-bit pixels and two 8-bit portions of a third 24-bit pixel are stored. In this implementation, although display memory storage space is not wasted, a pixel may straddle two display memory data words. This results in a complicated address generation and control structure, and poor performance, because a write operation to update display data for one pixel (i.e., one that straddles two data words) may require two memory accesses (compared to one memory access if each pixel is guaranteed to be stored in a single data word).
FIG. 2B shows another possible implementation of 24-bit color. In this implementation ("RGBX"), a group of four consecutive bytes (32 bits) represents each pixel, with one of the four 8-bit bytes ("X") ignored. No pixel straddles two words and all pixels have the same alignment. Addressing is simple and performance is often better than in the RGBR method. However, this method is wasteful of physical memory when the system is operating in 24-bit modes since one quarter of the display memory contains unused data.
FIG. 2C shows a 24-bit implementation ("RGB0") that is similar to RGBX. As in the RGBX method, each 64-bit access addresses two 24-bit pixels. The remaining 16 bits are ignored by the graphics controller and are, in fact, "holes" in the memory system where no physical memory is present. The advantage over the RGBX method is that 25% less physical memory is required. However, the RGB0 implementation, with 16 bits of memory "missing" from each of the 64-bit data words in the display memory bank, does not permit reconfiguration of the display memory for other pixel depths, such as the 16-bit "5:6:5" mode discussed above in conjunction with FIG. 1, because the physical display memory storage space is not "contiguous."
While the RGB0 method is currently used in systems which operate exclusively in the 24-bit mode, because of the reconfigurability problem, it has not been practical for use with general-purpose, multi-mode controllers. It is this limitation of the RGB0 display mode that is addressed by the present invention.